A Universal, Low-Delay, SEC-DEC-TAEC Code for State Register Protection

نویسندگان

چکیده

Finite State Machine (FSM) is widely used in electronic systems and its reliability critical to the system. Ionizing radiation induced soft error one of major concerns design systems, especially avionics or space applications. Nowadays, majority relies on single-error correction, double-error detection (SEC-DED) codes mitigate errors. However, presence multiple bit upsets becoming more prevalent as CMOS technology scales down. In addition, state registers FSMs usually have variable bit-widths strict requirement encoding decoding delay, which poses challenges for mitigation techniques. This paper presents an Error Detection Correction (EDAC) code register protection, can achieve correction triple-adjacent-error (SEC-DEC-TAEC) ability. The proposed be protect data with 4n bit-width (n = 2,3,4,...) using common encoder decoder block introduces minimal delay. Experiment results show that has better ability than most existing MCU codes. Besides, it reduces area occupation by 30% delay 15% compared Orthogonal Latin Square (OLS) case 8 data.

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ژورنال

عنوان ژورنال: IEEE Access

سال: 2022

ISSN: ['2169-3536']

DOI: https://doi.org/10.1109/access.2022.3178953